The D Latch (Quickstart Tutorial)

The D Latch is a logic circuit most frequently used for storing data in digital systems. It is based on the S-R latch, but it doesn’t have an “undefined” or “invalid” state problem. In this tutorial, you will learn how it works, its truth table, and how to build one with logic gates.

D latch symbol
D Latch Symbol

What is a D Latch?

A D latch can store a bit value, either 1 or 0. When its Enable pin is HIGH, the value on the D pin will be stored on the Q output. It builds upon the design of the S-R latch, with a few added logic gates. You can see a D Latch circuit based on the S-R latch built with NAND gates below:

D latch circuit with NAND gates
D Latch Circuit

The inverter on the input makes sure the S and the R inputs are always opposites, to avoid the invalid state of both being 1. The two NAND gates create a new input, E (Enable), that lets you control when you want to change the output to whatever is on the D input.

This means that the output Q can only change when the enable signal is 1. If it’s 0, the output is unaffected by any changes on D.

You can also build a D Latch with AND and NOR gates as follows:

D latch from AND and NOR gates

The D Latch can also be used to introduce delay in timing circuits, as a buffer, or for sampling data at specific intervals.

What’s the Difference Between Latch and Flip Flop?

The terms latch and flip flop are sometimes incorrectly used as synonyms since both can store a bit (1 or 0) at their outputs.

While a latch can change its output at any time as long as it’s enabled, a flip flop is an edge-triggered device that needs a clock transition to change its output.

To build a D Flip Flop, you’ll need two D latches, like this:

D flip flop built from latches

How Does the D Latch Work?

Since the output Q only changes when the E input is 1, you’ll get the following truth table:

(no change)
 1 00Reset Q to 0
 1 11Set Q to 1
D Latch Truth Table

In the first row of the truth table, the E input is 0. That means the latch is not enabled, so nothing happens. The Q output keeps whatever value it had. No matter what value the D input has, the Q output won’t change, it will keep its value as it is. This is how this circuit “remembers” a bit.

Take a look at the next two rows. Here the E input is 1, so the latch is enabled. This means that if the D input is 0, the Q output will be reset to 0. If the D input is 1, the Q output will be set to 1.

Analyzing the Circuit

You can build a D Latch circuit by adding three logic gates to the S-R latch circuit. In the next image, you can see the D Latch circuit’s bit path when it is enabled and it has 0 on the D input.

D latch circuit bit path

To analyze the above circuit you need to remember that the NAND gate only produces a 0 when its two inputs are both 1. In all other cases, it gives a 1.

To begin with, the inputs to the 1st NAND gate are 0 and 1, therefore, its output is 1. The 2nd NAND gate has both inputs at 1, so it returns 0.

The outputs of the 1st and 2nd NAND gates are the inputs to the section of the circuit that represents the basic S-R latch. With that in mind, you can divide the bits into two groups: Those that came before the S-R latch (Red) and those that were produced by the S-R Latch (Green).

Finally, if you look at the 4th NAND gate. You can see that one of its inputs is 0 due to the 2nd NAND gate. That information is enough to tell you that regardless of the value of its other input, it will give out 1. This bit is feedback to one of the inputs of the 3rd NAND gate. The other one is 1 due to the 1st NAND gate, so the result of the Q output is 0 – the same as input D.

Try going through this when D is 1 instead, and you’ll see that the output becomes 1.

From this bit path, you can conclude that the D Latch updates the output Q to what is on the D input as long as the E input is 1.

Experiment: Build Your Own D Latch Circuit

As a practical example, you can build a basic D Latch circuit using logic gates and test it out with pushbuttons. R1 and R2 are pull-down resistors to make sure the inputs are 0 when the buttons are not pushed:

Experiment of building and testing a D latch

As you can see in section 1 of the image, Q is 0 (LED L1 off), and both PB1 and PB2 are not pressed.

Next, look at section 2 where PB2 is pushed. You now have a 1 on the D input, but the output Q remains as 0 because the E input hasn’t received an enable signal yet.

Section 3 shows how PB1 is pressed, so a 1 on the E input appears and places the bit 1 from D to Q. When Q is 1 it turns on LED L1.

When PB1 and PB2 return to their original states in section 4, LED L1 remains ON indicating that the Q output has not changed.

To change the output Q you would need to push PB1 again.

To assemble the above circuit you need:

  • Four NAND gates (Ex CD4011)
  • One NOT gate (Ex CD4049 or CD4069)
  • 2x pushbuttons
  • 1x LED
  • 2x 10 kΩ resistors (R1 and R2)
  • 1x 330 Ω resistors (R3)


Do you have any questions about the D Latch and how it works? Let me know in the comments below.

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4 thoughts on “The D Latch (Quickstart Tutorial)”

  1. how does the led remain on when there is no 5 volt to power it.i know the bit is saved but still where does the LED get it’s power to stay on?

    • Logic gates must always be powered for them to work. But adding + and – connections to each gate would make the diagrams really messy, so they’re ommitted.

  2. “To change the output Q you would need to push PB1 again.” Don’t you mean push PB2 not PB1 in the example at the end ? PB1 relates to the enable signal if you push that it latches and saves what’s in memory , PB2 changes the Data signal from 0 to 1 or visa versa affecting Q or Q’ outputs setting or clearing the memory

    • PB2 sets the data input to either 1 or 0, but it doesn’t change the D latch output until the Enable signal comes (from PB2). So by pressing PB1 when PB2 is not pressed, the output becomes 0 (which means the output Q has changed).


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